1. Field of the Invention
The present invention relates to a semiconductor memory device.
2. Related Art
In recent years, there has been known an FBC (Floating Body Cell) memory as a semiconductor memory device expected to replace a DRAM. The FBC memory is configured to include field effect transistors (FETs) including floating bodies (hereinafter, also “bodies”) on an SOI (Silicon On Insulator), respectively. The FBC memory stores data “1” or data “0” in each FBC according to the number of holes accumulated in the body thereof.
It is assumed, for example, that each memory cell is constituted by an NMOS, a state in which the number of holes accumulated in the body of the memory cell is large is data “1”, and a state in which the number of holes accumulated in the body thereof is small is data “0”. For the sake of convenience, the memory cell storing therein data “1” is referred to as ““1”cell” and the memory cell storing therein data “0” is referred to as ““0” cell”, hereinafter. In the FBC memory, holes are accumulated in the body of each “0” cell through a source or drain diffusion layer, resulting in a “1” cell, or accumulated holes are emitted from the body of each “1” cell through the diffusion layer, resulting in a “0” cell. To deal with this, it is necessary to perform a refresh operation of reading data from each memory cell once and writing back data logically identical to the data to the memory cell.
However, in the conventional refresh operation, word lines are selected in order of addresses thereof, and the memory cells in all columns connected to each of the selected word lines are subjected to the refresh operation. Namely, the conventional refresh operation is performed regularly on all memory cells in a memory cell array irrespectively of whether each memory cell is good. The memory cells differ in data retention time depending on leakage characteristics and the like of their diffusion layers. Therefore, to refresh all the memory cells uniformly in a certain cycle means to consume unnecessary power in the refresh operation.